|
|
 |
| Spantasmic |
| STP, RSTP, MST (802.1 d
/ w / s) |
|
Spantasmic
is a flexible embedded implementation of the
Layer 2 spanning tree protocol (STP) and enhancements for
rapid recovery of connectivity (RSTP – IEEE 802.1W) and
VLAN-sensitivity (MST – IEEE 802.1S). It enables interoperable network redundancy on networking and
industrial equipment such as bridges and switches, or in
embedded switching frameworks within specialized embedded
applications. It also includes a bridging framework with
built-in forwarding and an address resolution logic-based
filtering database which can optionally stand-in for a
switch fabric chipset implementing similar functionality.
Seamless integration with native OS driver models
and standard MIB capabilities for any SNMP agent make
Spantasmic an excellent fit for managed embedded
environments.
|
|
|
|
|
|
|
|
|
|
|
|
Spantasmic for is a lean, robust implementation of
spanning tree protocols designed to run on embedded
devices such as bridges and
switches of any kind in network equipment or industrial
applications. Spantasmic's spanning tree protocols
provide path redundancy while preventing undesirable
loops in a network by enabling a bridge/switch to use
the most efficient path when faced with multiple paths,
and when the best path fails, to recalculate the network
and find the next best path.
Spantasmic includes support for the IEEE 802.1D STP
specification, as well as enhancements for rapid
recovery of connectivity when a bridged port fails (RSTP
– IEEE 802.1W) and VLAN-sensitivity (MSTP – IEEE 802.1S).
The different flavors of STP can be configured on a
per-port basis and also can have multiple instances of
the protocol running simultaneously.
Spantasmic allows full access to and control of the
various spanning tree variable values, including control
of relative priority of each bridge and port, and the
cost associated with each port. MIB support is provided
in the form of ioctl-style commands that may be
manipulated not just by SNMP, but also by existing CLI
or web based management systems that may be in place,
using basic wrapper code.
It also includes a full-featured software-based bridging
framework (which can be scaled out, if not in use) with
built-in forwarding and an address resolution
logic-based filtering database which can optionally
stand-in for a switch fabric chipset implementing
similar functionality.
Spantasmic’s tiny footprint and configurable modules
have been specifically designed for use in an embedded
environment. With validated protocol compliance and
interoperability with popular switch implementations,
extensive support of standards and underlying
reliability and flexibility, Spantasmic is an ideal fit
for LAN, WLAN and MAN applications, where multiple bridged
links without loops are required. |
|
 |
Features |
 |
 |
 |
|
 |
Full implementation of STP (802.1d), RSTP
(802.1w), and MST (802.1s). |
|
 |
Avoids loops in active paths while maintaining
path redundancy. |
|
 |
Highly configurable and management enabled
protocol implementation. |
|
 |
Memory requirements for each bridge port
independent of number of bridges and bridged
LANs. |
|
 |
Faster convergence and reconfiguration
independent of protocol timer values with RSTP. |
|
 |
Support for multiple VLAN-specific spanning
trees with MST. |
|
 |
Includes optional software bridging function
with ARL support. |
|
 |
Cross protocol compatibility between STP, RSTP,
and MST. |
|
 |
Support for CPU types of either endian-ness
including PowerPC, MIPS, X86, ARM/XScale. |
|
 |
Royalty-free full source distribution. |
|
|
 |
 |
 |
 |
|
|
|
|
 |
 |
|
Spantasmic has been
extensively validated on a variety of CPU architectures, which
minimizes development and integration efforts. Spantasmic supports the native
OS network driver model, enhanced memory management, & abstractions
that are lean, yet fast. |
|
Special Features |
|
 |
Support for multiple
instance STP/RSTP that is not restricted to a per-VLAN
instance (MST 802.1s) including MIB variable support |
|
 |
Flexibility in memory
management - choice of net or system pools for PDUs |
|
 |
Suitable for hardware
(ASIC) switch-fabric data-plane |
|
 |
Highly configurable
and management-enabled implementation |
|
 |
Integration with other
L2 protocols like LACP |
|
 |
Protocol specification
compliant and UNH test-suite verified |
|
|
|
|
|
|